ylai@lemmy.ml to RISC-V@lemmy.mlEnglish · 8 months agoLeaked docs hint Google may use SiFive RISC-V cores in next-gen TPUswww.theregister.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10cross-posted to: hardware@lemmit.onlineartificial_intel@lemmy.ml
arrow-up11arrow-down1external-linkLeaked docs hint Google may use SiFive RISC-V cores in next-gen TPUswww.theregister.comylai@lemmy.ml to RISC-V@lemmy.mlEnglish · 8 months agomessage-square0fedilinkcross-posted to: hardware@lemmit.onlineartificial_intel@lemmy.ml