In fairness to Intel, every modern semi design house has that same issue: a chip is designed and laid out for a specific node, so this isn’t really a failing so much as a how-it-works.
I thought i read somewhere that either their design was particularly tailored towards a specific node or that following that they made it a higher priority to be less bound to one. But i can’t find a source for it, so i might be mistaken.
I thought i read somewhere that either their design was particularly tailored towards a specific node or that following that they made it a higher priority to be less bound to one. But i can’t find a source for it, so i might be mistaken.